搜索资源列表
ad0820new
- AD0820小程序，能够实现AD转换的功能-OH
STCApplication
- sTC系列单片机内部AD的应用 STC89LE52AD、54AD、58AD、516AD这几款89系列的STC单片机内部自带有8路8位的AD转换器，分布在P1口的8位上，当时钟在40MHz以下时，每17个机器周期可完成一次AD转换。 -STC series single-chip internal AD Application STC89LE52AD, 54AD, 58AD, 516AD that several 89 series of STC has its own single-ch
ceshi0326
- 高速AD采集卡应用程序及SDRAM控制器-High-speed AD acquisition card applications and SDRAM controller
adc
- 实现MAX187单通道12位串行输出AD器件采样时序的生成。-use MAX187 to sample
0809AD
- 模拟产生ADC0809时序 ，对ADC0809输入一个模拟量，进行A/D转化。-ADC0809 generate timing simulation of an ADC0809 analog input for A/D conversion.
daima
- 状态机控制AD转换模块 该模块主要实现对MAX197的控制：根据设计需要对芯片进行初始化（包括写控制字选择输入电压值范围、选择通道以及工作模式），并把通道数送指示灯显示以及用键盘控制通道号（按一下，通道号加1，同时点亮相应的指示灯，循环使用个通道）；控制状态机的工作时序，并置两次采集到的数据为12位数据输出，并经过锁存进程来锁存数据，最后从锁存器中把输出数据-The state machine controls AD and changes the module this module ma
HighSpeedAD
- 基于FPGA数据采集系统，用VHDL语言描述，实现对高速AD转换的控制。-FPGA-based data acquisition system, described by VHDL language to realize high-speed AD conversion control.
ad_conv
- 利用CPLD来控制AD进行电压采样，并将采样值输出-CPLD to control the use of AD to voltage sampling, and sampling the value of output
ADC
- 对AD0809进行操作，将AD转换后的结果直接对对8个发光二极管进行赋值，程序有详细的注释！-Operation of the AD0809 will be the result of AD conversion directly against eight light-emitting diodes for assignment, procedures detailed notes!
200M_DA_AD
- 自己编的，用FPGA实现软件DDS调幅。编程语言是VHDL。拿出来相互学习一下。-Own, and with FPGA AM DDS software. Programming language is VHDL. Look out to learn from each other.
ad
- 2812AD转换的程序,压缩包中为整个工程文件 -2812AD conversion process, compressed package for the entire project file
ad5510
- TLC5510 的状态机控制程序，控制方法简单，并已经测试通过。-TLC5510 control procedures of the state machine, control method is simple and has the test.
ADPCM
- APPCM算法和AD/DA芯片驱动在CPLD中的实现，已在实际硬件中测试OK，quartus2环境-APPCM algorithm and AD/DA chip in the drive to achieve in the CPLD has been tested in actual hardware OK, quartus2 environment
ads7844
- ADS7844 AD转换芯片的VHDL控制器-ADS7844 AD converter chip VHDL controller
hh
- ad1674的控制程序VHDL 利于初学者掌握AD新片的控制，实现了初始化，采集存储-AD1674 CONTROL VHDL
fir
- 先用matlab得到所需滤波器的系数，将AD采样的数据经过fir滤波器后输出-First to use matlab to obtain the required filter coefficients, data from the AD sample, after the output filter through the fir
ADS7852
- FPGA采用VHDL语言驱动ADS7852的程序,-FPGA and ADS7852
beta1_1
- 自已写的幅频转换vhdl代码，ad用的是tl549DA用的是5620。1602显示-To write their own amplitude-frequency converter vhdl code, ad using a tl549DA using a 5620.1602 Show
oscillograph
- 用VHDL编写的oscillograph数字部分源代码，在Altera FPGA上跑通。直接把模拟部分输入输出AD，DA信号接入本模块即可。-Digital oscillograph with the written part of the VHDL source code, in the Altera FPGA on the run-pass. Directly to the analog input and output AD, DA signal can access this modul
tlc2543AND11channel
- 11路串行AD采集芯片TLC2543，12BIT精度输出，100Khz，采用VERILOG HDL编写，占用200个LE-11-Channel Serial AD acquisition chip TLC2543, 12BIT accuracy of the output, 100Khz, using VERILOG HDL preparation, taking up 200 LE